CS 347: Computer Organization II (Digital
Logic)
Fall, 2002
Lectures: Monday, Wednesday, Friday at 4:00 in ES 80
Instructor: James Johnson
Office Hours: BH 314, Monday, Wednesday, Friday, 2:00-3:00 pm
Instructor
contact:
johnson@cs.wwu.edu
http://www.cs.wwu.edu/johnson
Text:
Digital Design: Principles and Practice, Third Edition (updated),
by John F. Wakerly (Prentice-Hall, 2001)
Grade computation:
50% take-home midterm
50% take-home final
Tentative grade scale: 90+ = A, 75+ = B, 60+ = C, 50+ = D, 50- = F
Course overview:
The preceding course, Computer Organization I, emphasizes instruction set
architecture and assembly language. This course deals with the underlying
hardware that supports a computer instruction set. Where the instruction set
manipulates bits and bytes, the hardware manipulates corresponding voltage and
current levels. The primary expected outcome is that the student understand how
to construct digital logic designs for machines that approach a computer in
complexity. We follow that textbook author's topic selection, which starts with
elementary AND and OR circuits and then proceeds to more capable building
blocks.
After an initial review of number systems and codes, we investigate the
electrical properties of semiconductors that underlies the binary world of logic
design. This study culminates with an abstraction called a gate, which is an
electronically controlled switch. We then study how to assemble gates into
felicitous combinations that realize intermediate level functions, such as
encoders and multiplexers. Finally, time permitting, we show how to assemble
deploy these devices to implement the memory, logical and arithmetical
operations, and sequence control of a computer instruction set.
This is the art of digital logic design, which supports two main branches:
combinational circuits and sequential circuits. Each branch occupies several
chapters in the text. There is certainly more material in the text than the
ten-week term can accommodate. We will proceed linearly as far as possible. Upon
finishing the text, you will able to start the design of a functional computer,
a task that is taken up in more detail in the next course, CS 420.
Parallel programming appears as a common thread throughout the development
because it is the nature of hardware to proceed in parallel to a stable
configuration of node voltages across an entire circuit. An important course
component is the treatment of hardware design languages that capture this
parallel activity. In addition to gate-level solutions, most designs in the text
also provide ABEL (Advanced Boolean Equation Language) and VHDL (Very high speed
integrated circuit Hardware Description Language) solutions. Distributed with
the text is a CD that contains simulators for these languages. Although we will
not have time to investigate these resources in the course, I encourage you to
experiment with them.
I will suggest exercises that you should attempt to help your mastery of
the material. I will provide solutions if requested in class. Even if not asked,
I will discuss those exercises that are helpful in the lecture context. I
anticipate that class presentation of some fraction of the exercises will occupy
about one-third of the lectures. The exercises will not enter into the grading
formula.